The goal of DIFOOL project is to demonstrate an ultra-low noise frequency synthesis based on coupled opto electronic oscillators (COESs) and high-frequency low-noise frequency dividers. MINOTOR project showed that passive or active optical resonators combined with an adapted laser source is a promising way to improve performances of OEOs as they allow a direct oscillation at high frequency within a significantly compact volume, especially when compared to optical-fiber-delay based OEOs. Within MINOTOR, we indeed demonstrated a COEO at 10 GHz, with performances close to that of OEwaves (best commercial product) using French- of European-only components. Quartz-based oscillators are now reaching their limits in terms of performances and availability of high-grade materials. As such, opto electronic oscillators represent a promising alternative for next generation civil or military RF systems (improvement of sensitivity for radar and electronic warfare systems, higher bandwidth for telecommunication and improved stability and precision for positioning and navigation). However, system analysis has shown that those OEOs could greatly benefit from the association with synthesis components well suited to their specificity. Within this “Astrid Maturation” project « DIFOOL », we will realize a compact high-frequency (up to 30 GHz) COEO demonstrator (TRL 4) and a low-noise high-frequency divider (TRL5), which, when combined, will allow the demonstration of a novel frequency synthesis principle with performances well above that of quartz synthesis. This project gathers all the required competencies through the following 5-partner consortium: Thales Research & Technology France (TRT - coordinator), one SME : OSAT, two academic labs (Laboratoire d’Analyse et d’Architecture des Systèmes and Laboratoire Aimé Cotton), and Thales Alenia Space. This project consists of 4 principal tasks. The first one will be devoted to the system analysis for a telecom payload application and the consequent requirements for oscillators and dividers. The 30 GHz COEO demonstrator will be designed and realized (TRL 4) within the second task, as well as, in parallel, a 10 GHz COEO, that will allow us to test different architectures. The third task is devoted to the analysis, design and realization of the high-frequency low-noise frequency divider (TFL 5). At last, the frequency division of the COEO will be demonstrated within the fourth task. Preliminary environmental tests and exploitation scheme will be conducted as well. Expected output for this project are : - Realization of 2 COEOs at 30 GHz and 10 GHz, as 2 compact breadboard at TRL4, exhibiting phase noise level of -120 to -125 dBc/H at 1kHz and -150 dBc/Hz at 100 kHz (floor) - Realization of several high-frequency low-noise frequency dividers, allowing to reach 1GHz (phase noise of 150dBc/Hz at 1 kHz, -170 dBc/Hz at 100 kHz) exhibiting TRL5 at the chip level and TRL4, when packaged in modules. - Demonstration at TRL4 of frequency synthesis combining COEOs and dividers. Those results will be exploited by OSAT -an SME which is specialized in technologies for RF synthesis for spatial applications- under the supervision of TAS -system makers in the space industry- and TRT which will bridge the gap with radar and electronic warfare applications that should benefit as well from those developments.