The dataset contains the raw measurements of the time necessary to reconfigure Lattice iCE40 FPGAs. The main goal is to see the effect of two approaches of implementing the reconfiguration process in software for Evolvable Hardware. One approach is to use existing open-source software externally, the other is to integrate the functionality in the software for Evolvable Hardware. The conditions for the reconfiguration measurements were altered in four dimensions: The FPGA board iCEstick Lattice iCE40 HX1K FPGA Sample bitstream created by Bitstream Evolution Software No direct reconfiguration possible iCE40 breakout board (ICE40HX8K-B-EVN) Lattice iCE40 HX8K FPGA Sample bitstream created by CoBEA Write Target Flash Bitstream first written to an external EEPROM, then pulled by the FPGA from the EEPROM Direct Bitstream written directly to the FPGA Reconfiguration approach Icestorm Use external tools from Project Icestorm CoBEA Use integrated function of CoBEA reconfiguration module Bitstream size Full No size reduction Compact Size reduced as much as allowed by write approach Icestorm: skip BRAM CoBEA: skip BRAM, skip comment, full compaction (level 4) This upload contains three groups of files: 2 bitstreams One for each used FPGA board 12 measurements Comma-separated values File name contains the contiditions of the measurement Only 12 out of 16 possible combinations of conditions as "iCEstick" cannot be combined with "Direct" 1 aggregated statistic Comma-separated values Minimum, mean, maximum, mean-minimum, maximum-mean for every measurement

This work was supported by the German Federal Ministry of Education and Research (BMBF, 01IS18026B) by funding the competence center for Big Data and AI "ScaDS.AI Dresden/Leipzig".