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Wireless Tb/s communications are expected to become a main technology trend within the next ten years and beyond. Furthermore, for several decades, improvement in silicon technology has provided higher frequency, lower cost per gate, higher integration density and lower power consumption. However, microelectronics has now reached a point where it can no longer keep pace with the requirements of future communication systems, alone. Therefore, the Tb/s data rate is a significant challenge for the design of transceivers and in particular for forward error correction (FEC), the most complex component in the baseband chain. Consequently, silicon implementations of advanced channel coding schemes require a cross-layer approach involving coding theory, decoding algorithm development, parallel hardware architectures and semiconductor technology. This talk has introduced the H2020 EPIC project (GA 760150, 2017-2020) which aims at designing and implementing FEC codes for wireless Tb/s technology and beyond-5G systems. The project objectives and the adopted methodology have been presented as well as some latest results.
[INFO.INFO-AR] Computer Science [cs]/Hardware Architecture [cs.AR], [INFO.INFO-NI] Computer Science [cs]/Networking and Internet Architecture [cs.NI], [INFO.INFO-TS] Computer Science [cs]/Signal and Image Processing, [INFO.INFO-IT] Computer Science [cs]/Information Theory [cs.IT], [SPI.TRON] Engineering Sciences [physics]/Electronics
[INFO.INFO-AR] Computer Science [cs]/Hardware Architecture [cs.AR], [INFO.INFO-NI] Computer Science [cs]/Networking and Internet Architecture [cs.NI], [INFO.INFO-TS] Computer Science [cs]/Signal and Image Processing, [INFO.INFO-IT] Computer Science [cs]/Information Theory [cs.IT], [SPI.TRON] Engineering Sciences [physics]/Electronics
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