ESD study on a-IGZO TFT device architectures

descriptionPublicationkeyboard_double_arrow_right Article , Conference object 01 Sep 2018Publisher:IEEEJournal:2018 40th Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD)Funded by:EC | FLICs

Authors: Simicic, Marko; Hellings, Geert; Chen, Shih-Hung; Myny, Kris; Linten, Dimitri;

doi: 10.23919/eos/esd.2018.8509748

ESD study on a-IGZO TFT device architectures

- Summary
- Metrics

Abstract

The indium-gallium-zinc-oxide (IGZO) thin-film-transistor (TFT) technology offers to manufacture transistors on large and flexible substrates at low processing temperatures and at a low cost. However, optimization of ESD protection devices in this technology has not been thoroughly investigated. This paper analyzes the ESD performance of three different TFT device architectures.

Related Organizations

Katholieke Universiteit Leuven
Belgium
INTERUNIVERSITAIR MICRO-ELECTRONICA CENTRUM VZW
Belgium

Impact byBIP!

	selected citations These citations are derived from selected sources. This is an alternative to the "Influence" indicator, which also reflects the overall/total impact of an article in the research community at large, based on the underlying citation network (diachronically).	6
	popularity This indicator reflects the "current" impact/attention (the "hype") of an article in the research community at large, based on the underlying citation network.	Average
	influence This indicator reflects the overall/total impact of an article in the research community at large, based on the underlying citation network (diachronically).	Average
	impulse This indicator reflects the initial momentum of an article directly after its publication, based on the underlying citation network.	Top 10%