Article signat per 34 autors/es: Lluc Alvarez, Abraham Ruiz, Arnau Bigas-Soldevilla, Pavel Kuroedov, Alberto Gonzalez, Hamsika Mahale, Noe Bustamante, Albert Aguilera, Francesco Minervini, Javier Salamero, Oscar Palomar (Barcelona Supercomputing Center Barcelona, Spain); Jens Hagemeyer, Lennart Tigges, Nils Kucza (Bielefeld University Bielefeld, Germany); Vassilis Papaefstathiou, Antonis Psathakis, Nikolaos Dimou, Michalis Giaourtas, Iasonas Mastorakis, Georgios Ieronymakis, Georgios-Michail Matzouranis, Vasilis Flouris, Nick Kossifidis, Manolis Marazakis (Institute of Computer Science, FORTH Heraklion, Crete, Greece); Jean-Marc Philippe (Thales Research & Technology Palaiseau, France); Bhavishya Goel, Madhavan Manivannan, Ahsen Ejaz, Panagiotis Strikos, Mateo Vázquez, Ioannis Sourdis, Pedro Trancoso, Per Stenström (Chalmers University of Technology Gothenburg, Sweden); Ioannis Papaefstathiou (Exascale Performance Systems EXAPSYSPlc Thessaloniki, Greece)

The eProcessor project aims at creating a RISC-V full stack ecosystem. The eProcessor architecture combines a high-performance out-of-order core with energy-efficient accelerators for vector processing and artificial intelligence with reduced-precision functional units. The design of this architecture follows a hardware/software co-design approach with relevant application use cases from the high-performance computing, bioinformatics and artificial intelligence domains. Two eProcessor prototypes will be developed based on two fabricated eProcessor ASICs integrated into a computer-on-module.

The eProcessor project has received funding from the European High-Performance Computing Joint Undertaking (JU) under grant agreement No956702.The JU receives support from the European Union’s Horizon 2020 research and innovation programme and the respective national research organisations from Spain (PCI2021121991/ MCIN/AEI/10.13039/501100011033), Sweden, Greece, Italy, France(ANR-20-EHPC-0006), and Germany(BMBF).The eProcessor project is also co-funded by the UE NextGenerationEU/PRTR.

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