The concept of Power Valve is presented. It consists of power switch transistors and control circuits, which give variable impedance to the power supply. The circuit controls the internal power supply voltage of logic circuits and reduces the voltage swing of signals. An experiment using a 130-nm test chip showed a 36.0% operating power reduction for a 16-bit multiplier at 50MHz. The Power Valve can be designed using logic transistors, with the same leakage current to the circuit which have IO transistor switch.