The last six years have seen the increasing advance of computational and algorithmic complexity to compute mask patterns that retain sufficient lithographic fidelity to print and yield well enough to maintain the advances in circuit density that are the engine of the semiconductor economy. New Computational Lithography techniques such as Optical Proximity Correction (OPC), Scattering Bars (SB), Phase Shift Masks (PSM), and Lithography Verification (LV) constitute a significant transformation of the design. Initially applied only to the most critical portions of the most critical layers such as gate poly and active, they are now considered de-rigueur for almost every layer through and including the topmost metal layers. These new Computational Lithography applications have become one of the most computationally demanding steps in the design process. Compute farms of hundreds and even thousands of CPUs are now routinely used to run these applications. This paper will examine the evolution of these techniques and the computing systems to run them. A variant of Amdahl's law and an example COO equation to compute cost of ownership for the hardware platforms are developed. The practical aspects of the infrastructure needed to support such extensive compute farms including power, support, and cooling will be examined. Newly emerging High Performance Computing (HPC) techniques that hold the promise of checking this unbridled growth in computational requirements will be reviewed and contrasted including multi-core processors, Field Programmable Gate Arrays (FPGAs), The Cell Broadband Engine (CBE), Digital Signal Processors (DSPs), and Graphics Processing Units (GPUs) will be considered.