The authors present a method to pattern etch masks for arbitrary nano- and microstructures on different, inclined planes of a sample. Our method allows standard CMOS fabrication techniques to be used in different inclined planes; thus yielding three-dimensional structures with a network topology. The method involves processing of the sample in a first plane, followed by mounting the prepared sample in a specially designed silicon holder wafer such that the second, inclined plane is exposed to continued processing. As a proof of principle we demonstrate the fabrication of a patterned chromium etch mask for three-dimensional photonic crystals in silicon. The etch mask is made on the 90° inclined plane of a silicon sample that already contains high aspect ratio nanopores. The etch mask is carefully aligned with respect to these pores, with a high translational accuracy of