Starting with the recipe for the fabrication process of a silicon p-n junction varactor diode, the semiconductor device equations are solved using the finite-element method. The capacitance of the reverse biased diode is extracted using the junction depletion width which is quantified by introducing a depletion factor. Validation of the complete modeling process is achieved by fabricating the diode, mounting it on a microwave circuit and comparing experimental scattering parameter data with those predicted by a circuit simulator with the imported physical model.