In this paper, we propose a different single-transistor capacitor-less DRAM which is operated at low drain voltage and enables low-power applications. The basic mechanism is the meta-stable dip (MSD) effect recently discovered (Bawedin et al., 2004, 2005). MSD gives rise to a hysteresis in ID(VG) curves and a dip in transconductance gm. We demonstrate by systematic measurements and simulations that MSDRAMs with long retention time can be achieved