A family of CMOS operational transconductance amplifiers (OTAs) has been designed for very small G/sub m/'s (of the order of nanoamperes per volt) with transistors operating in moderate inversion. Several OTA design schemes such as conventional, using current division, floating-gate, and bulk-driven techniques are discussed. A detailed comparison has also been made among these schemes in terms of performance characteristics such as power consumption, active silicon area, and signal-to-noise ratio. The transconductance amplifiers have been fabricated in a 1.2-/spl mu/m n-well CMOS process and operate at a power supply of 2.7 V. Chip test results are in good agreement with theoretical results.