We present a leakage current replica (LCR) keeper for dynamic domino gates that uses an analog current mirror to replicate the leakage current of a dynamic gate pull-down stack and thus tracks process, voltage, and temperature. The proposed keeper has an overhead of one field-effect transistor per gate plus a portion of a shared current mirror. Techniques for properly sizing LCR keepers are presented. Using these sizings, LCR keepers allow design of and-or circuits with 30% more legs than conventional keepers at the same noise margin in a 90-nm, 1.2-V CMOS logic process. Furthermore, 16-24-leg dynamic AO circuits are 25%-40% faster when using the replica keeper. We demonstrated the circuit operation on a 1024 words times 72 bits, 3W/4R embedded SRAM macro using a four-stage LCR-keeper domino structure for a read-out circuit