This paper aims to analyze the choice of the guard interval (GI) length in PLC systems to optimize the achievable throughput under power and symbol error-rate (SER) constraints. In general, the GI length is chosen so that there is no interference, i.e. the GI length is greater than or equal to the channel impulse response length. However, many previous works have shown that in PLC systems, this GI choice is inefficient in terms of achievable throughput. Indeed, shorter GI evidently results in inter-symbol interference (ISI) and inter-carrier interference (ICI), but the gain offered by shortened GI may exceed the loss caused by interference. In this paper, we propose a simple solution for the GI length adaptation in PLC systems to optimize the achievable throughput.