A low power asynchronous DES

descriptionPublicationkeyboard_double_arrow_right Article , Conference object 13 Nov 2002Publisher:IEEEJournal:ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196), volume 4, pages 538-541

Authors: Pui-Lam Siu; Chiu-sing Choy; Jan Butas; Cheong-Fat Chan;

doi: 10.1109/iscas.2001.922293

A low power asynchronous DES

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Abstract

Nowadays, there are many Cryptographic Applications that demand both high speed and low power. In order to meet this requirement, we have designed a new asynchronous Data Encryption Standard (DES) data encryption chip and decided that can be used in contactless smart cards. There are many advantages to use Asynchronous Circuit Design in smart card chips, such as low power consumption and no global clock. We will use a 0.6 /spl mu/m CMOS technology to fabricate the chip and the RF test circuit.

Related Organizations

The Chinese University of Hong kong
Hong Kong
Chinese University of Hong Kong
China (People's Republic of)

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