High-speed network systems require a wide-frequency-range clock system for data processing. Frequency calibration method enables the voltage-controlled oscillator (VCO) in a phase-locked loop (PLL) to cover the expected frequency range for high-speed applications that require a wide locking range. Frequency range adjustment is implemented by means of a current DAC, which controls the current of an inverter chain oscillator. The circuit is implemented within small space in a high-speed hard disk drive channel with 0.25-/spl mu/m four-layer metal CMOS technology.