An output-capacitorless FVF-based low-dropout regulator for power management applications

descriptionPublicationkeyboard_double_arrow_right Article , Conference object 01 Jul 2016 Spain Publisher:IEEEJournal:2016 IEEE 14th International Conference on Industrial Informatics (INDIN)

Authors: Shirmohammadli, V.; Saberkari, Alireza; Martínez García, Herminio; Alarcón Cot, Eduardo José;

doi: 10.1109/indin.2016.7819169

handle: 2117/101898

An output-capacitorless FVF-based low-dropout regulator for power management applications

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Abstract

This paper presents an output-capacitorless low dropout (LDO) regulator based on improved flipped voltage follower power stage for use in power management circuits. A new error amplifier (EA) structure, named as gain-bandwidth enhanced EA, is embedded in the LDO regulator. The LDO regulator is designed for the input and output voltages of 1.2 V and 1 V, respectively. Fast transients, low overshoot and undershoot, and low quiescent current of 6 µA are achieved for the proposed circuit. The LDO regulator is designed for maximum load current of 50 mA, achieving the current and power efficiencies of 99.99% and 83.3%, respectively. Additionally, up to 131 pF capacitance is used in the proposed LDO structure. The proposed circuit is designed and verified in HSPICE in TSMC 0.18 µm mixed signal CMOS process.

Peer Reviewed

Country

Spain

Related Organizations

University of Barcelona
Spain
Universitat Politècnica de Catalunya
Spain
University of Guilan
Iran (Islamic Republic of)
Universitat Polite`cnica de Catalunya
Spain

Keywords

flipped voltage follower (FVF), Microelectronics, error amplifier, gain-bandwidth enhanced EA., Àrees temàtiques de la UPC::Enginyeria elèctrica, Microelectrònica, Low-dropout regulator, Àrees temàtiques de la UPC::Enginyeria electrònica

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