This paper describes the design and implementation of a low-power wide dynamic range radio-frequency (RF) power detector in a standard 0.18-μm CMOS process. The proposed circuit includes a root-mean-square (RMS) power detector and a logarithmic amplifier. The RMS power detector exploits the nonlinear characteristic of MOSFET to realize the RMS conversion. A current-mirror active load is used in the RMS power detector to increase the RMS conversion gain. Since the output of the RMS power detector is a DC voltage, the following logarithmic amplifier does not require wide operating bandwidth, thus allowing simple circuit realization with minimum power dissipation. Simple differential amplifier is used to realize the limiting gain stage. Post-layout simulation results showed that the proposed circuit was able to detect input power from -70 dBm to -20 dBm with signal frequencies ranging from 0.5 GHz to 5 GHz, while dissipating only 0.9 mW under a 1.8-V power supply voltage.