
Wordline voltage generating circuit with high speed active mode and low power standby mode is proposed. In the active mode, two different ring oscillators with high clock frequency (fCLK) 170 MHz, and low clock frequency (fCLK) 25 MHz which is also the operating frequency of the entire circuit, are employed. The proposed circuit has a short response time of 3 mus typically in active mode, and very low standby current about 3 muA in standby mode.
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