In this paper, a CMOS data output buffer is proposed. The buffer shows high-speed performance together low noise characteristics. The performance is achieved by implementing a precharging of the output load. The buffer was developed with a 0.35 /spl mu/m CMOS technology and a 3.3 V power supply. Eldo simulations have been used to validate its features, and a delay lower than 3 ns with a voltage noise of about 300 mV was found.