A new processor architecture for digital signal transport systems

descriptionPublicationkeyboard_double_arrow_right Article , Conference object 01 Jan 1997Publisher:IEEEJournal:Proceedings International Conference on Computer Design VLSI in Computers and Processors

Authors: Minoru Inamori; Kenji Ishii; Akihiro Tsutsui; Kazuhiro Shirakawa; Hiroshi Nakada; Toshiaki Miyazaki;

doi: 10.1109/iccd.1997.628863

A new processor architecture for digital signal transport systems

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Abstract

This paper proposes a new processor architecture for manipulating protocols in digital signal transport systems. To realize flexible and high-performance digital signal transport systems, the architecture has unique application-specific hardware with a core CPU. It is derived from an analysis of functions in real systems. A computer simulation confirms the efficiency of the architecture.

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