
A GIDL (Gate Induced Drain Leakage) current model for advanced MOSFETs has been proposed and implemented into HiSIM2, first complete surface potential based model. The model consists of one tunneling mechanism considering two tunneling currents, band to band tunneling (BTBT) and trap assisted tunneling (TAT), and requires totally 7 model parameters covering all bias conditions. Simulation results of NFETs and PFETs reproduce measurements for any device size without binning. Validity of the model has been tested with a circuit, which is sensitive to the change of the stored charge due to tunneling current.
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