Summary form only given. FPGAs fabrics have become much more complex, including a range of hard IP for memory, DSP and I/O functions. FPGAs have also become much larger, supporting much larger designs and a need to raise the design abstraction level. DSM effects are threatening the FPGA abstraction in which these effects are hidden from the designer by clever circuit design and guard banding. For example, at 400 MHz in a 45 nm FPGA, on chip variation (OCV) will become such a large portion of cycle time that simply guard banding will leave too much performance on the table. FPGAs are also expanding into new markets where cost and power consumption are more important than performance. These changes present many design tool challenges and create numerous opportunities for innovation.