In this paper, a simulation procedure was established for the fatigue life prediction of transistor assembly system under thermo-mechanical cyclic loading condition. By combining non-linear finite element (FE) methodology and test data, the failure mechanisms of transistor assembly system in response to thermal cyclic loading condition were investigated. Anand material constitutive model was adopted to describe the behavior of solder layers under the thermal loading conditions. The Coffin-Manson model and the damage expressions were used for the solder layers reliability assessment. An average inelastic energy density accumulated in one cycle over the volume of the critical solder layer was characterized as a parameter for the transistor fatigue life prediction. Based on the framework developed, the fatigue life of two transistor structures with and without void was estimated. The numerical work was validated by the available test data. It is found that the FE results have very good match with the experimental results. It is, therefore, shown that the proposed procedure for the fatigue life prediction of transistor assembly system under the thermal shock cyclic loading condition is reliable.