The scope of this paper is to describe how to achieve and optimize Zero-Voltage Switching (ZVS) in an energy buffered single-phase inverter. The inverter can be described as a three-port system in which the third port is the storage capacitor. Several operation modes are used along the line cycle, depending on the required voltages and currents in the three ports. The operation modes shape the inductor current and control the power balance among ports. Operation modes are selected to ensure ZVS in every transition and minimum power precessed by the inductor. The energy in the inductor is used to obtain ZVS. ZVS is not only important to reduce dramatically switching losses, but also to limit dv/dt in switching nodes. GaN transistors require low current in the inductor to perform ZVS compared to Silicon devices since they feature around four times lower parasitic capacitance. This paper describes a methodology to calculate the minimum current in the inductor required to perform ZVS in all transitions, and the trade-off between $\boldsymbol{R_{ds}}$ and $\boldsymbol{C_{oss}}$ of switching devices. Results obtained are applied and validated in the prototype.