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Paralleled inverters with zero common-mode voltage

Authors: Dong Jiang; Zewei Shen;

Paralleled inverters with zero common-mode voltage

Abstract

This paper introduces a PWM method for paralleled inverters which can achieve zero common-mode voltage. The paralleled inverters are connected through coupling inductors to the load. Based on the voltage vectors in each inverter, paralleled voltage vectors are proposed to combine the reference voltage. The action time can be distributed to each inverter and achieve zero common mode voltage for output. The distribution of voltage vectors in the two inverters is balancing the voltage of the two inverters in each switching cycle to make sure the circulating current can be easily controlled through small coupling inductors. Simulation and experimental results are provided to validate the proposed method and showing that it is benefiting for both CM and DM noise reduction.

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Powered by OpenAIRE graph
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selected citations
These citations are derived from selected sources.
This is an alternative to the "Influence" indicator, which also reflects the overall/total impact of an article in the research community at large, based on the underlying citation network (diachronically).
BIP!Citations provided by BIP!
popularity
This indicator reflects the "current" impact/attention (the "hype") of an article in the research community at large, based on the underlying citation network.
BIP!Popularity provided by BIP!
influence
This indicator reflects the overall/total impact of an article in the research community at large, based on the underlying citation network (diachronically).
BIP!Influence provided by BIP!
impulse
This indicator reflects the initial momentum of an article directly after its publication, based on the underlying citation network.
BIP!Impulse provided by BIP!
10
Top 10%
Top 10%
Top 10%
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