A 36/spl times/24 mm active pixel sensor imaging area device is studied which would be ideal for use with standard 35 mm cameras. By applying multichip methods to active pixel sensors, the 39/spl times/30 mm system contains on board all the control circuitry and A/D converters, so the system outputs digital data. The large area requires a redundancy of design for a high yield. This starts with the active pixel cell, which able to withstand several defects and still be repairable, which CCD cells are not. The whole system is targeted at preventing bad rows or columns. By using spares in the row and column circuitry, as well as spare A/D converters the chip yield is only limited by a relatively small logic and control block. With repairs the yield of this 11.7 sq. cm system goes from almost nil to more than 80%-93% with modest defect densities of 1.5 to 0.5 per sq. cm. By being a retrofit for current 35 mm cameras, and having larger photodiode pixels than current APS's this CMOS device would be nearly as sensitive as CCD's but at much lower production costs and much higher yields.