We present recent results on the direct heterogeneous integration of InP HBTs and Si CMOS on a silicon template wafer or SOLES (Silicon On Lattice Engineered Substrate). InP HBTs whose performance are comparable to HBTs on the native InP substrates have been repeatedly achieved. 100% heterogeneous interconnect yield has been achieved on daisy chain test structures with CMOS-InP HBT spacing (interconnect length) as small as 2.5um. In DARPA COSMOS Phase 1 we designed and fabricated a differential amplifier that met the program Go/NoGo metrics with first pass design success. As the COSMOS Phase 2 demonstration vehicle we designed and fabricated a low power dissipation, high resolution, 500MHz bandwidth digital-to-analog converter (DAC).