
Design analysis of CMOS low dropout regulator (LDO)focusing on low quiescent current and load transient improvement methodologies and structures are discussed in this paper.Low quiescent current in battery-operated systems is an intrinsic performance parameter because it partially determines battery life. Load transient improvement helps avoiding malfunction, reset, latch up or fail of microprocessor which is supplied from the LDO. Some low quiescent current LDOs witmicroprocessh improved load transient are included and analysed.
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