Tail-biting codes are suitable for high rate codes of short block length as they do not introduce any rate loss and have a simpler a posteriori Probability (APP) decoder structure than block codes. For such high rate codes, an APP algorithm working on the trellis of the dual code is preferred since the branch complexity is much less compared to the original code trellis. However, the nature of the metrics in a dual-APP decoder makes a hardware realisation quite complex, due to very fine quantisation requirements. This paper points out the problems associated with a traditional log domain approach and proposes a new metric representation scheme. The arithmetic operations involved in a trellis based implementation are discussed. The proposed scheme is applied to a sub optimum decoder for tail-biting codes and simulation results are given.