The paper presents a diagnostic tool for analyzing the bit intermodulations in digital-to-analog converters (DACs). Bit intermodulations cause linearity errors which degrade the performance of the converter. A better understanding of these errors can lead to designing and building more accurate converters. Therefore, a new static nonlinear model is proposed to incorporate intermodulation errors. A linear transformation of the Walsh transform of the integrated nonlinearity diagram (INL) is shown to be sufficient to extract the bit intermodulation terms and their noise sensitivity. Practical applicability of the proposed method is shown by measurements performed on a custom-designed test circuit.