Common mode-voltage elimination and DC-link balancing for three-level inverter

S.K. Sahoo; R. Sultanat; A. Anbarasu

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https://doi.org/10.1...arrow_drop_down

https://doi.org/10.1049/cp.201...

Article . 2011 . Peer-reviewed

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https://dx.doi.org/10.1049/cp....

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Common mode-voltage elimination and DC-link balancing for three-level inverter

descriptionPublicationkeyboard_double_arrow_right Article , Other literature type 01 Jan 2011Publisher:IETJournal:International Conference on Sustainable Energy and Intelligent Systems (SEISCON 2011)

Authors: S.K. Sahoo; R. Sultanat; A. Anbarasu;

doi: 10.1049/cp.2011.0375

Common mode-voltage elimination and DC-link balancing for three-level inverter

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Abstract

The paper presents the effects and importance of parameters like harmonics and currents that are to be accounted for the satisfactory performance of an inverter. Practically known problems such as common-mode voltage between inverter and load neutral and the dc-link unbalance of source capacitors are affect the performances of the inverter. A novel solution is discussed for these issues.

Related Organizations

Vellore Institute of Technology University
India

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