Electrical Overstress of Integrated Circuits

descriptionPublicationkeyboard_double_arrow_right Article 01 Nov 2014 English Publisher:Elsevier BVJournal:Microelectronics Reliability, volume 54, pages 2,410-2,416 (issn: 0026-2714,

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Authors: K. T. Kaschani; Reinhold Gärtner;

doi: 10.1016/j.microrel.2014.04.007

Electrical Overstress of Integrated Circuits

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Abstract

Abstract Common misconceptions regarding electrical overstress (EOS) and the failure characteristics of integrated circuits (ICs) are summarized, analyzed and clarified. In order to avoid EOS fails right from the beginning of the IC design process, a methodology is proposed that accounts for the special characteristics of ICs and their applications in order to deal with EOS in the design, handling and application of ICs.

Related Organizations

Texas Instruments (United States)
United States
Infineon Technologies (Germany)
Germany

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