Abstract Negative bias temperature instability (NBTI) is a major degradation mechanism of PMOSFET devices. When the p-channel field effect transistor (PFET) gate is biased negatively with respect to the channel, as in a CMOS inverter, at an elevated temperature the threshold voltage (Vt) decreases (absolute value increases for application temperatures) and the drive current (Ion) decreases. This degrades the device performance and may lead to circuit failure. NBTI has strong dependence on temperature, gate voltage, time, and gate oxide thickness. It also depends on device area and/or geometry. NBTI models used in industry are empirical. I have observed, on different (bulk and SOI) technologies, during the last several years that NBTI recovers with bake. The recovery amount and rate depend on the bake temperature. Full recovery is achieved at temperatures above 325 °C. After full recovery, the device behaves like new. Part of the NBTI recovery can be explained by piezo- and pyro-electric effect induced by the compressive nitride liner over the PFET.