Study of the power capability of LDMOS and the improved methods

descriptionPublicationkeyboard_double_arrow_right Article 01 May 2006 English Publisher:Elsevier BVJournal:Microelectronics Reliability, volume 46, pages 1,001-1,005 (issn: 0026-2714,

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Authors: Zhilin Sun; Weifeng Sun 0001; Yangbo Yi; Longxing Shi;

doi: 10.1016/j.microrel.2005.07.111

Study of the power capability of LDMOS and the improved methods

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Abstract

In this paper, the failure process of LDMOS is analyzed. It is found that three peak electric fields locate in the Si/SiO2 interface of LDMOS, which result in three hot spots. From the time the device turns on, the first peak electric field increases and the second one remains constant while the third one decreases. The device fails due to the hot spots induced by the first and the second peak electric fields. Power capability can be enhanced by reducing these two peak electric fields. Methods to improve the power capability are proposed.

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Southeast University
China (People's Republic of)

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