Evaluation of Single-Chip, Real-Time Tomographic Data Processing on FPGA SoC Devices
Copyright policy )Evaluation of Single-Chip, Real-Time Tomographic Data Processing on FPGA SoC Devices
A novel approach to tomographic data processing has been developed and evaluated using the Jagiellonian PET (J-PET) scanner as an example. We propose a system in which there is no need for powerful, local to the scanner processing facility, capable to reconstruct images on the fly. Instead we introduce a Field Programmable Gate Array (FPGA) System-on-Chip (SoC) platform connected directly to data streams coming from the scanner, which can perform event building, filtering, coincidence search and Region-Of-Response (ROR) reconstruction by the programmable logic and visualization by the integrated processors. The platform significantly reduces data volume converting raw data to a list-mode representation, while generating visualization on the fly.
IEEE Transactions on Medical Imaging, 17 May 2018
system design, Physics - Instrumentation and Detectors, parallel computing, FOS: Physical sciences, Equipment Design, Instrumentation and Detectors (physics.ins-det), 102020 Medical informatics, 102020 Medizinische Informatik, Positron-Emission Tomography, Image Interpretation, Computer-Assisted, computer-aided detection and diagnosis, Nuclear imaging, Algorithms
system design, Physics - Instrumentation and Detectors, parallel computing, FOS: Physical sciences, Equipment Design, Instrumentation and Detectors (physics.ins-det), 102020 Medical informatics, 102020 Medizinische Informatik, Positron-Emission Tomography, Image Interpretation, Computer-Assisted, computer-aided detection and diagnosis, Nuclear imaging, Algorithms
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