
This paper presents a novel method to obtain non-power-of-two (NP2) fast Fourier transform (FFT) flow graphs based on a new prime factor algorithm (PFA). The FFT flow graph is crucial for designing FFT architectures but previous works only provide systematic approaches to build flow graphs for power-of-two sizes (P2). Thus, the derivation of NP2 flow graphs is an important step towards the design of efficient NP2 FFT architectures. The proposed approach consists of two independent parts. On the one hand, it obtains all the possible index mappings that lead to a flow graph with no rotations between butterflies. On the other hand, it determines the permutations between butterflies in the flow graph. By combining these two parts, the order of the inputs and outputs is derived. As a result, the entire flow graph is obtained systematically. Additionally, the proposed approach generates all the possible flow graphs for a given factorization of the FFT size. The reduction in operations for NP2 FFTs using the proposed approach leads to a significant reduction in area and power consumption concerning P2 FFTs with similar sizes after implementing the proposed flow graphs directly in hardware. Particularly, there is a significant improvement between the proposed 30-point and 60-point FFT and previous efficient P2 FFTs. This remarkable fact sets NP2 at the forefront of FFT research after being in second place behind P2 FFTs for decades.
index mapping, Telecomunicaciones, Fast Fourier transform (FFT), prime factor algorithm (PFA), Electrónica, non-power-of-two (NP2), butterfly.
index mapping, Telecomunicaciones, Fast Fourier transform (FFT), prime factor algorithm (PFA), Electrónica, non-power-of-two (NP2), butterfly.
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