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Data created by an experiment that evolved a tone discriminator on an iCE40 FPGA. The experiment was originally conducted by Adrian Thompson on an Xilinx XC6200 FPGA in 1997. This is the reproduction on a modern FPGA. The tone discriminator is a circuit on the FPGA that creates a 3.3 V output signal if presented with a 10 kHz square wave input and a 0 V output signal for a 1 kHz input signal. The circuit was evolved with a Genetic Algorithm and evaluated in three ways: Clamping: Iterative process to evaluate which cells in the circuit contribute dynamically to the output. A random cell is chosen a and its output set to a random constant value. Afterwards the fitness of the circuit is measured. If it decreases by less than 1 %, the cell is kept clamped, else reset to its original state. Temperature dependence: The FPGA with the circuit was cooled or heated to different temperatures and presented with different input frequencies. The output was averaged over 5 s. Location dependence: The circuit was moved to a different location o the FPGA. The Genetic Algorithm was then continued for additional 200 generations. This upload contains four groups of files: experiment.h5 All measurements and chromosomes from the original run of the Genetic Algorithm clamping.h5 All measurements of the clamping process temperature-XX.h5 All measurements for a different temperature XX is the temperature in degree Celsius new_location-X.h5 All measurements and chromosomes for the continued Genetic Algorithm at a new location on the FPGA X is the running number for hundred generations in the file, e.g. 2 contains generations 101 to 200 Errata: The timestamps for the temperature measurements are missing in all files but experiment.h5.
This work was supported by the German Federal Ministry of Education and Research (BMBF, 01IS18026B) by funding the competence center for Big Data and AI "ScaDS.AI Dresden/Leipzig".
FPGA, Evolvable Hardware
FPGA, Evolvable Hardware
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