This archive contains the benchmarks used in the conference paper "Multipurpose Cacheing to accelerate OpenMP Target Regions on FPGAs" Abstract: While FPGAs can offer great throughput and energy effi- ciency, when offloading OpenMP target regions to them the memory bandwidth often limits the ability to exploit their potential. As a remedy, our OpenMP-to-FPGA compiler fully automatically inserts optimized multipurpose cache blocks into the generated FPGA hardware. We ex- ploit characteristics of OpenMP target regions to both avoid costly bus snooping hardware and to achieve cache consistency. On a diverse set of benchmarks with data reuse the caches reduce the runtime by 43% on average, while only consuming slightly more FPGA resource.