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This archive contains code and instructions supporting the paper: "Turbo: SmartNIC-enabled Dynamic Load Balancing of μs-scale RPCs" in HPCA'23. Using the discrete-event queuing simulator in this archive, researchers can study the effect of static and dynamic load balancing policies on the tail response latency of a multi-core system under configurable parameters such as the NIC-CPU interface latency, request service time distribution, and number of serving units.
SmartNIC, Tail Latency, Load Balancing
SmartNIC, Tail Latency, Load Balancing
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