The fundamental energetic limit of computation is established by Landauer's Principle, which sets a lower bound on heat generation for every bit of information erased. While modern Inductive Logic Programming (ILP) has achieved significant success in symbolic rule induction, and while low-power electronic design automation has long optimised circuits for switching energy, no existing synthesis flow closes a feedback loop around measured dissipation on the physical substrate during synthesis itself. This paper introduces Thermodynamic Inductive Synthesis (TIS), a proposed closed-loop framework that integrates in situ dissipation measurement directly into the logic generation process. We describe the Fine-Grained Reconfigurable Thermodynamic Substrate (FGRTS), a hardware architecture for measuring transient dissipation at the gate-cluster level, and the Gradient-Based Inductive Synthesiser (GBIS), which extends differentiable relaxation techniques to penalise measured dissipation. We derive the logical irreversibility floor for two benchmark primitives from first principles: a 4-bit magnitude comparator erases 6.73 bits per operation (1.93 x 10^-20 J at 300 K) and a 4-bit parity checker erases 3.00 bits (8.61 x 10^-21 J). Under stated and clearly flagged assumptions, we project a composite dissipation reduction of approximately 32% relative to standard-cell synthesis. This paper presents a theoretical framework and an architectural proposal; it reports no experimental or simulated results, and the gradient estimator required to close the proposed loop remains an open problem, which we state explicitly in the section on the gradient estimator.