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stnolting/neorv32: v1.12.9

Authors: stnolting; Unai Martinez-Corral; Andreas; Lukas Pajak; Michael Fischer; Mikael Mortensen; SirBramble; +22 Authors

stnolting/neorv32: v1.12.9

Abstract

What's Changed Use macros for memory-mapped register bitmaks operations by @stnolting in https://github.com/stnolting/neorv32/pull/1497 [twd] extend interrupts by @stnolting in https://github.com/stnolting/neorv32/pull/1498 ⚠️ [twd] map to FIRQ channel 4 by @stnolting in https://github.com/stnolting/neorv32/pull/1499 Optimize cache module by @stnolting in https://github.com/stnolting/neorv32/pull/1500 Bump actions/upload-artifact from 6 to 7 by @dependabot[bot] in https://github.com/stnolting/neorv32/pull/1501 Bump actions/download-artifact from 7 to 8 by @dependabot[bot] in https://github.com/stnolting/neorv32/pull/1502 Minor rtl edits by @stnolting in https://github.com/stnolting/neorv32/pull/1503 🧪 Rework image generator: use ELF as input by @stnolting in https://github.com/stnolting/neorv32/pull/1504 [bootloader] add flexible executable base address by @stnolting in https://github.com/stnolting/neorv32/pull/1505 [twd] remove twd_scl_o signal by @stnolting in https://github.com/stnolting/neorv32/pull/1506 🐛 fix GPTMR half-word access to PRSC register by @stnolting in https://github.com/stnolting/neorv32/pull/1509 [bootloader] add 2 new UART config options by @stnolting in https://github.com/stnolting/neorv32/pull/1510 [sw/lib] replace deprectated RISC-V GCC macros by @stnolting in https://github.com/stnolting/neorv32/pull/1511 [sw/lib] replace elf with libelf if on macOS by @urbanij in https://github.com/stnolting/neorv32/pull/1512 🐛 [image_gen] fix COE, MEM & MIF output by @stnolting in https://github.com/stnolting/neorv32/pull/1514 [makefile] allow override of build result path; allow help extension by @wwwweb in https://github.com/stnolting/neorv32/pull/1516 [makefile] try to determine host OS/platform by @stnolting in https://github.com/stnolting/neorv32/pull/1515 [gpio] add optional IO direction control by @stnolting in https://github.com/stnolting/neorv32/pull/1517 [trng] add TRNG architecture configuration generics and ⚠️ rework control register layout by @stnolting in https://github.com/stnolting/neorv32/pull/1518 fix(bus): SC.W returns 0 on success instead of stale memory data by @14sea in https://github.com/stnolting/neorv32/pull/1520 New Contributors @urbanij made their first contribution in https://github.com/stnolting/neorv32/pull/1512 @wwwweb made their first contribution in https://github.com/stnolting/neorv32/pull/1516 @14sea made their first contribution in https://github.com/stnolting/neorv32/pull/1520 Full Changelog: https://github.com/stnolting/neorv32/compare/v1.12.8...v1.12.9

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