This document collects every load-bearing equation in the TRC V8 framework, organized around the eight-gate architecture that constitutes the system’s processing pipeline. Each gate corresponds to a distinct construct — a functionally separated processing stage with its own mathematical objects, failure modes, and role within the containment–coherence duality. This integrated edition incorporates the inclusion map formulation (Addendum II), the dual-channel architecture (Addendum III), findings from systematic multi-pass review of the complete paper archive (July 2025 through March 2026), the cross-inference architecture (Humility Wake), the adiabatic adversarial exploit characterization, the sycophancy–hallucination cascade, the bounding torus Trel with topological linking conservation, the chiral governor, and the spectral triple identification.