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Preprint . 2026
License: CC BY
Data sources: ZENODO
ZENODO
Preprint . 2026
License: CC BY
Data sources: Datacite
ZENODO
Preprint . 2026
License: CC BY
Data sources: Datacite
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Catalyst N2: Full Loihi 2 Feature Parity in an Open Neuromorphic Processor with Programmable Neuron Microcode and Cloud FPGA Validation

Authors: Shulayev Barnes, Henry Arthur;

Catalyst N2: Full Loihi 2 Feature Parity in an Open Neuromorphic Processor with Programmable Neuron Microcode and Cloud FPGA Validation

Abstract

I present Catalyst N2, the second generation of the Catalyst neuromorphic processor architecture, achieving full feature parity with Intel's Loihi 2. Building on the Catalyst N1 foundation of 128 cores with 131K neurons and Loihi 1 equivalence, N2 introduces a programmable neuron microcode engine that replaces the fixed CUBA integrate-and-fire model with user-defined neuron dynamics — enabling Izhikevich, adaptive LIF, sigma-delta, and resonate-and-fire models to execute natively on the same silicon. Four graded spike payload formats (binary through 24-bit), variable-precision weight packing (1–16 bit), convolutional synapse encoding, per-synapse-group plasticity control, and a hierarchical dendritic compartment tree with per-dendrite thresholds round out the architectural extensions. The accompanying SDK has grown from 14 modules and 168 tests (N1) to 88 modules and 3,091 tests across three backends: a cycle-accurate CPU simulator with hardware-accurate fixed-point defaults, a GPU simulator with stochastic rounding in the learning path for silicon-faithful weight evolution, and an FPGA hardware backend. Hardware-accurate defaults, 24-bit fixed-point arithmetic, strict SRAM budget enforcement, and 7-bit learning trace registers are enabled by default, ensuring that every simulation faithfully represents what the hardware would produce. I validate a 16-core instance on an AWS F2 Xilinx VU47P at 62.5 MHz, achieving 28/28 (100%) pass rate across seven test categories spanning single-neuron dynamics, synaptic connectivity, network topologies, multi-core routing, scale, and operational correctness. Feature coverage analysis identifies 155 Loihi 2 features, of which 152 are fully implemented and 3 are hardware-only (requiring physical multi-chip links). The Spiking Heidelberg Digits benchmark from N1 is preserved at 85.9% accuracy. Catalyst N2 is, to my knowledge, the first independently developed neuromorphic architecture to achieve comprehensive Loihi 2 parity and the first to be validated on cloud FPGA infrastructure.

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Keywords

neuromorphic processor, neuron microcode, spiking neural networks, programmable neuron, event-driven computing, neuromorphic computing, FPGA, Loihi 2

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selected citations
These citations are derived from selected sources.
This is an alternative to the "Influence" indicator, which also reflects the overall/total impact of an article in the research community at large, based on the underlying citation network (diachronically).
BIP!Citations provided by BIP!
popularity
This indicator reflects the "current" impact/attention (the "hype") of an article in the research community at large, based on the underlying citation network.
BIP!Popularity provided by BIP!
influence
This indicator reflects the overall/total impact of an article in the research community at large, based on the underlying citation network (diachronically).
BIP!Influence provided by BIP!
impulse
This indicator reflects the initial momentum of an article directly after its publication, based on the underlying citation network.
BIP!Impulse provided by BIP!
0
Average
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Green