We present N-Radix, an open-source optical accelerator architecture based on wavelength-division ternary logic. Building on prior theoretical work, we describe a complete systolic array architecture optimized for AI/ML workloads. The design employs log-domain tower scaling where the NR-IOC reinterprets base-3 trits as 3^3 encoding, yielding up to 9× throughput improvement for addition operations. For matrix multiplication workloads, the architecture delivers approximately 1.8× throughput improvement via Amdahl's Law. At 960×960 scale, this yields 148 PFLOPS per chip—59× NVIDIA's B200. Compared to Frontier (1,200 PFLOPS), equivalent performance requires only 8 N-Radix chips at less than 0.02% of the power.