
1.現代電腦架構嚴格分離記憶體(DRAM)和儲存(SATA/SSD),並透過南橋(PCH)等傳統晶片組組件路由儲存流量。這種分離主要是歷史遺留問題,而非根本原因。本提案探討了一種以記憶體為中心的架構,其中儲存介面(例如SATA或串行儲存鏈路)直接整合在DRAM邊界,完全繞過南橋。透過利用AI管理的緩衝、時序容差和模組化記憶體端邏輯,可以將儲存視為一個擴展的、高延遲的記憶體層,而不是傳統的I/O裝置。本文檔闡述了實現此系統的動機、架構原則以及分階段演進路徑。2. update SIM ,CF.
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