This artifact contains logic to evaluate the effectiveness of SkeleShare, as presented in SkeleShare: Algorithmic Skeletons and Equality Saturation for Hardware Resource Sharing, an upcoming CGO'26 paper. SkeleShare is a fully automated system for resource allocation and hardware sharing in functional FPGA compilation. It combines: a multi-abstraction skeleton IR, equality saturation to explore all legal transformation sequences, a solver‑based extractor that jointly decides allocation and sharing under device constraints, and a structured lowering pipeline that targets the SHIR compiler and Intel FPGA toolchains. The Docker image in this artifact reproduces the paper's main results, which are found in Table III. VHDL code for all experiments can be generated using a single command inside the container, and results are written to the local results/ directory for inspection and further processing.