This paper proposes to build a soft,platform independent,reconfigurable power electronic control processor in HDL. Currently power electronic control processors are designed with digital signal processors/microcontrollers with limited re - configurability and input - output ca pabilities,also DSP/microcontrollers suffer processor obsolescence risk. This can be reduced with the use of a reconfigurable control processor design in HDL and implemented on FPGA. Currently FPGA are used along with DSP for glue logic purpose and input - output expansion. So it is economical to use a single FPGA along with a soft core CPU and control modules as hardware accelerators. S ome of the soft cores available are licensed and are targeted to a particular FPGA,so a 32 bit soft,reconfigurable power electronic control processor is developed from scratch. https://www.ijiert.org/paper-details?paper_id=141295