Currently, many impedance measurement systems have been developed. This project details the design, implementation and characterization of a FPGA-based bio impedance measurement system, whose goal is obtaining good performance at low costs. Signal generation and processing circuits were implemented within the FPGA ALU, as well as the NIOS II embedded processor. An ADA conversion board as well as a front-end previously designed and implemented by the group of instrumentation and biomedical engineering were also incorporated. Finally, a communication mechanism between the FPGA ALU and the computer was also designed and implemented. For the implementation of proposed work use VHDL platform. The proposed shows better security as compare to goal is and other encoding and decoding method. The performance analysis carried out by analyzing the utilization of Maximum frequency: 87 MHz. The number of step calculating Galois Field algorithm taken by device Spartan is 6 steps. Clock cycle for each step required 33.85 MHz. The proposed method shows good result not only in the security purpose also in the frequency level on FPGA implementation.