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handle: 11573/1656225 , 11568/841174
High-level parallel programming is a de-facto standard approach to develop parallel software with reduced time to development. High-level abstractions are provided by existing frameworks as pragma-based annotations in the source code, or through pre-built parallel patterns that recur frequently in parallel algorithms, and that can be easily instantiated by the programmer to add a structure to the development of parallel software. In this paper we focus on this second approach and we propose P3ARSEC, a benchmark suite for parallel pattern-based frameworks consisting of a representative subset of PARSEC applications. We analyse the programmability advantages and the potential performance penalty of using such high-level methodology with respect to hand-made parallelisations using low-level mechanisms. The results are obtained on the new Intel Knights Landing multicore, and show a significantly reduced code complexity with comparable performance.
Intel KNL, Parallel patterns, PARSEC benchmarks, Intel KNL; Parallel patterns; PARSEC benchmarks
Intel KNL, Parallel patterns, PARSEC benchmarks, Intel KNL; Parallel patterns; PARSEC benchmarks
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