
III-V semiconductor-based devices, particularly InP heterojunction bipolar transistors, are a strong contender for next-generation high-speed communication systems. In this paper, we present motivation for the upscaling of III-V technology onto 300 mm Si platforms. A comparison of various options for such III-V on Si technology is described. The challenges in the way to achieve its integration into the existing CMOS platform and possibilities to overcome them are shown. We describe imec’s path to demonstrate a CMOS-compatible III-V-on-300 mm Si technology with the most recent results. Full publication available online: https://www.riverpublishers.com/pdf/ebook/chapter/RP_9788770046640C4.pdf
III-V, HBT, 6G, InP, III-V on Si, HBT, InP, III-V on Si, III-V, 6G
III-V, HBT, 6G, InP, III-V on Si, HBT, InP, III-V on Si, III-V, 6G
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